Release Note for 200-9533 Version 60-01
Release date
2022-12-19
Description
This release note applies to version 60-01 of the 200-9533 FPGA image for Napatech NT200A02 SmartNICs.
Release history from version 43-13 to 60-01
New Features
No new features
Resolved Issues
| ID | Customer tracking number | Summary | Found in version | Resolved in version |
|---|---|---|---|---|
| 44882 | When using the VLAN dynamic offset, the value might be wrong by +/- 6 bytes. Consequently, the following functions may not work as expected: Hashing, correlation key, masking, header stripping, and slicing. | 200-9533-22-05 | 200-9533-60-01 | |
| 44331 | The slicer in the local retransmit path, is not working correctly when tunneled offsets are used. | 200-9533-43-11 | 200-9533-60-00 |
Known issues
| ID | Customer tracking number | Summary | Found in version |
|---|---|---|---|
| 42959 | 38700 | On the NT200A02 PTP operation is not supported at 100 Mbit/s. | 200-9533-20-10 |
Notes
This image supports 8x10G port speed and the Capture Test & Measurement (TM1) feature set on the Napatech NT200A02 SmartNIC
PBA compatibility
- 073-013901-02
- 073-013901-03
Test status
Complete test plan
SmartNICs supported
NT200A02
Release note generated at
2022-12-19